RESUMEN

Amorphous indium gallium zinc oxide (a-IGZO) is becoming an increasingly important technological material. Transport in this material is conceptualized as the heavy disorder of the material causing a conduction or mobility band-edge that randomly varies and undulates in space across the entire system. Thus, transport is envisioned as being dominated by percolation physics as carriers traverse this varying band-edge landscape of "hills" and "valleys". It is then something of a missed opportunity to model such a system using only a compact approach-despite this being the primary focus of the existing literature-as such a system can easily be faithfully reproduced as a true microscopic TCAD model with a real physically varying potential. Thus, in this work, we develop such a "microscopic" TCAD model of a-IGZO and detail a number of key aspects of its implementation. We then demonstrate that it can accurately reproduce experimental results and consider the issue of the addition of non-conducting band-tail states in a numerically efficient manner. Finally, two short studies of 3D effects are undertaken to illustrate the utility of the model: specifically, the cases of variation effects as a function of device size and as a function of surface roughness scattering.

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Conventional transistors have long emphasized signal modulation and amplification, often sidelining polarity considerations. However, the recent emergence of negative differential transconductance, characterized by a drain current decline during gate voltage sweeping, has illuminated an unconventional path in transistor technology. This phenomenon promises to simplify the implementation of ternary logic circuits and enhance energy efficiency, especially in multivalued logic applications. Our research has culminated in the development of a sophisticated mixed transconductance transistor (M-T device) founded on a precise Te and IGZO heterojunction. The M-T device exhibits a sequence of intriguing phenomena, zero differential transconductance (ZDT), positive differential transconductance (PDT), and negative differential transconductance (NDT) contingent on applied gate voltage. We clarify its operation using a three-segment equivalent circuit model and validate its viability with IGZO TFT, Te TFT, and Te/IGZO TFT components. In a concluding demonstration, the M-T device interconnected with Te TFT achieves a ternary inverter with an intermediate logic state. Remarkably, this configuration seamlessly transitions into a binary inverter when it is exposed to light.

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Amorphous IGZO (a-IGZO) thin-film transistors (TFTs) are standard backplane electronics to power active-matrix organic light-emitting diode (AMOLED) televisions due to their high carrier mobility and negligible low leakage characteristics. Despite their advantages, limitations in color depth arise from a steep subthreshold swing (SS) (≤ 0.1 V/decade), necessitating costly external compensation for IGZO transistors. For mid-size mobile applications such as OLED tablets and notebooks, it is important to ensure controllable SS value (≥ 0.3 V/decade). In this study, a conversion mechanism during plasma-enhanced atomic layer deposition (PEALD) is proposed as a feasible route to control the SS. When a pulse of a diethylzinc (DEZn) precursor is exposed to the M2O3 (M = In or Ga) surface layer, partial conversion of the underlying M2O3 to ZnO is predicted on the basis of density function theory calculations. Notably, significant distinctions between In-Ga-Zn (Case I) and In-Zn-Ga (Case II) films are observed: Case II exhibits a lower growth rate and larger Ga/In ratio. Case II TFTs with a-IGZO (subcycle ratio of In:Ga:Zn = 3:1:1) show reasonable SS values (313 mV decade-1) and high mobility (µFE) of 29.3 cm2 Vs-1 (Case I: 84 mV decade-1 and 33.4 cm2 Vs-1). The rationale for Case II's reasonable SS values is discussed, attributing it to the plausible formation of In-Zn defects, supported by technology computer-aided design (TCAD) simulations.

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We demonstrate an InGaZnO (IGZO)-based synaptic transistor with a TiO2buffer layer. The structure of the synaptic transistor with TiO2inserted between the Ti metal electrode and an IGZO semiconductor channel O2trapping layer produces a large hysteresis window, which is crucial for achieving synaptic functionality. The Ti/TiO2/IGZO synaptic transistor exhibits reliable synaptic plasticity features such as excitatory post-synaptic current, paired-pulse facilitation, and potentiation and depression, originating from the reversible charge trapping and detrapping in the TiO2layer. Finally, the pattern recognition accuracy of Modified National Institute of Standards and Technology handwritten digit images was modeled using CrossSim simulation software. The simulation results present a high image recognition accuracy of ∼89%. Therefore, this simple approach using an oxide buffer layer can aid the implementation of high-performance synaptic devices for neuromorphic computing systems.

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In this study, a transparent and flexible synaptic transistor was fabricated based on a random-network nanowire (NW) channel made of indium gallium zinc oxide. This device employs a biocompatible chitosan-based hydrogel as an electrolytic gate dielectric. The NW structure, with its high surface-to-volume ratio, facilitated a more effective modulation of the channel conductance induced by protonic-ion polarization. A comparative analysis of the synaptic properties of NW- and film-type devices revealed the distinctive features of the NW-type configuration. In particular, the NW-type synaptic transistors exhibited a significantly larger hysteresis window under identical gate-bias conditions. Notably, these transistors demonstrated enhanced paired-pulse facilitation properties, synaptic weight modulation, and transition from short- to long-term memory. The NW-type devices displayed gradual potentiation and depression of the channel conductance and thus achieved a broader dynamic range, improved linearity, and reduced power consumption compared with their film-type counterparts. Remarkably, the NW-type synaptic transistors exhibited impressive recognition accuracy outcomes in Modified National Institute of Standards and Technology pattern-recognition simulations. This characteristic enhances the efficiency of practical artificial intelligence (AI) processes. Consequently, the proposed NW-type synaptic transistor is expected to emerge as a superior candidate for use in high-efficiency artificial neural network systems, thus making it a promising technology for next-generation AI semiconductor applications.

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In this study, optoelectronic synaptic transistors based on indium-gallium-zinc oxide (IGZO) with a casein electrolyte-based electric double layer (EDL) were examined. The casein electrolyte played a crucial role in modulating synaptic plasticity through an internal proton-induced EDL effect. Thus, important synaptic behaviors, such as excitatory post-synaptic current, paired-pulse facilitation, and spike rate-dependent and spike number-dependent plasticity, were successfully implemented by utilizing the persistent photoconductivity effect of the IGZO channel stimulated by light. The synergy between the light stimulation and the EDL effect allowed the effective modulation of synaptic plasticity, enabling the control of memory levels, including the conversion of short-term memory to long-term memory. Furthermore, a Modified National Institute of Standards and Technology digit recognition simulation was performed using a three-layer artificial neural network model, achieving a high recognition rate of 90.5%. These results demonstrated a high application potential of the proposed optoelectronic synaptic transistors in neuromorphic visual systems.

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Printing technology will improve the complexity and material waste of traditional deposition and lithography processes in device fabrication. In particular, the printing process can effectively control the functional layer stacking and channel shape in thin-film transistor (TFT) devices. We prepared the patterning indium gallium zinc oxide (IGZO) semiconductor layer with Ga, In, and Zn molar ratios of 1:2:7 on Si/SiO2 substrates. And the patterning source and drain electrodes were printed on the surface of semiconductor layers to construct a TFT device with the top contact and bottom gate structures. To overcome the problem of uniform distribution of applied voltages between electrode centers and edges, we investigated whether the circular arc channel could improve the carrier regulation ability under the field effect in printed TFTs compared with a traditional structure of rectangular symmetry and a rectangular groove channel. The drain current value of the IGZO TFT with a circular arc channel pattern was significantly enhanced compared to that of a TFT with rectangular symmetric source/drain electrodes under the corresponding drain-source voltage and gate voltage. The field effect properties of the device were obviously improved by introducing the arc-shaped channel structure.

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We report a new physics-based model for dual-gate amorphous-indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) which we developed and fine-tuned through experimental implementation and benchtop characterization. We fabricated and characterized a variety of test patterns, including a-IGZO TFTs with varying gate widths (100-1000 µm) and channel lengths (5-50 µm), transmission-line-measurement patterns and ground-signal-ground (GSG) radio frequency (RF) patterns. We modeled the contact resistance as a function of bias, channel area, and temperature, and captured all operating regimes, used physics-based modeling adjusted for empirical data to capture the TFT characteristics including ambipolar subthreshold currents, graded interbias-regime current changes, threshold and flat-band voltages, the interface trap density, the gate leakage currents, the noise, and the relevant small signal parameters. To design high-precision circuits for biosensing, we validated the dc, small signal, and noise characteristics of the model. We simulated and fabricated a two-stage common source amplifier circuit with a common drain output buffer and compared the measured and simulated gain and phase performance, finding an excellent fit over a frequency range spanning 10 kHz-10 MHz.

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Analog in-memory computing synaptic devices are widely studied for efficient implementation of deep learning. However, synaptic devices based on resistive memory have difficulties implementing on-chip training due to the lack of means to control the amount of resistance change and large device variations. To overcome these shortcomings, silicon complementary metal-oxide semiconductor (Si-CMOS) and capacitor-based charge storage synapses are proposed, but it is difficult to obtain sufficient retention time due to Si-CMOS leakage currents, resulting in a deterioration of training accuracy. Here, a novel 6T1C synaptic device using only n-type indium gaIlium zinc oxide thin film transistor (IGZO TFT) with low leakage current and a capacitor is proposed, allowing not only linear and symmetric weight update but also sufficient retention time and parallel on-chip training operations. In addition, an efficient and realistic training algorithm to compensate for any remaining device non-idealities such as drifting references and long-term retention loss is proposed, demonstrating the importance of device-algorithm co-optimization.

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As the scale-down and power-saving of silicon-based channel materials approach the limit, oxide semiconductors are being actively researched for applications in 3D back-end-of-line integration. For these applications, it is necessary to develop stable oxide semiconductors with electrical properties similar to those of Si. Herein, a single-crystal-like indium-gallium-zinc-oxide (IGZO) layer (referred to as a pseudo-single-crystal) is synthesized using plasma-enhanced atomic layer deposition and fabricated stable IGZO transistors with an ultra-high mobility of over 100 cm2  Vs-1 . To acquire high-quality atomic layer deposition-processed IGZO layers, the plasma power of the reactant is controlled as an effective processing parameter by evaluating and understanding the effect of the chemical reaction of the precursors on the behavior of the residual hydrogen, carbon, and oxygen in the as-deposited films. Based on these insights, this study found that there is a critical relationship between the optimal plasma reaction energy, superior electrical performance, and device stability.

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The potassium (K+) ion is an essential mineral for balancing body fluids and electrolytes in biological systems and regulating bodily function. It is associated with various disorders. Given that it exists at a low concentration in the human body and should be maintained at a precisely stable level, the development of highly efficient potassium-selective sensors is attracting considerable interest in the healthcare field. Herein, we developed a high-performance, potassium-selective field-effect transistor-type biosensor platform based on an amorphous indium gallium zinc oxide coplanar-gate thin-film transistor using a resistive coupling effect with an extended gate containing a potassium-selective membrane. The proposed sensor can detect potassium in KCl solutions with a high sensitivity of 51.9 mV/dec while showing a low sensitivity of <6.6 mV/dec for NaCl, CaCl2, and pH buffer solutions, indicating its high selectivity to potassium. Self-amplification through the resistive-coupling effect enabled an even greater potassium sensitivity of 597.1 mV/dec. Additionally, we ensured the stability and reliability of short- and long-term detection through the assessment of non-ideal behaviors, including hysteresis and drift effects. Therefore, the proposed potassium-sensitive biosensor platform is applicable to high-performance detection in a living body, with high sensitivity and selectivity for potassium.

Asunto(s)

RESUMEN

The c-axis aligned crystalline indium-gallium-zinc-oxide field-effect transistor (CAAC-IGZO FET), exhibiting an extremely low off-state leakage current (~10-22 A/µm), has promised to be an ideal candidate for Dynamic Random Access Memory (DRAM) applications. However, the instabilities leaded by the drift of the threshold voltage in various stress seriously affect the device application. To better develop high performance CAAC-IGZO FET for DRAM applications, it's essential to uncover the deep physical process of charge transport mechanism in CAAC-IGZO FET. In this work, by combining the first-principles calculations and nonradiative multiphonon theory, the charge trapping and emission properties in CAAC-IGZO FET have been systematically investigated. It is found that under positive bias stress, hydrogen interstitial in Al2O3 gate dielectric is probable effective electron trap center, which has the transition level (ε (+1/-1) = 0.52 eV) above Fermi level. But it has a high capture barrier about 1.4 eV and low capture rate. Under negative bias stress, oxygen vacancy in Al2O3 gate dielectric and CAAC-IGZO active layer are probable effective electron emission centers whose transition level ε (+2/0) distributed at -0.73~-0.98 eV and 0.69 eV below Fermi level. They have a relatively low emission barrier of about 0.5 eV and 0.25 eV and high emission rate. To overcome the instability in CAAC-IGZO FET, some approaches can be taken to control the hydrogen concentration in Al2O3 dielectric layer and the concentration of the oxygen vacancy. This work can help to understand the mechanisms of instability of CAAC-IGZO transistor caused by the charge capture/emission process.

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This paper introduces a compact SPICE model of a two-terminal memory with a Pd/Ti/IGZO/p+-Si structure. In this paper, short- and long-term components are systematically separated and applied in each model. Such separations are conducted by the applied bias and oxygen flow rate (OFR) during indium gallium zinc oxide (IGZO) deposition. The short- and long-term components in the potentiation and depression curves are modeled by considering the process (OFR of IGZO) and bias conditions. The compact SPICE model with the physical mechanism of SiO2 modulation is introduced, which can be useful for optimizing the specification of memristor devices.

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In this article, we study the post-annealing effect on the synaptic characteristics in Pd/IGZO/SiO2/p+-Si memristor devices. The O-H bond in IGZO films affects the switching characteristics that can be controlled by the annealing process. We propose a switching model based on using a native oxide as the Schottky barrier. The barrier height is extracted by the conduction mechanism of thermionic emission in samples with different annealing temperatures. Additionally, the change in conductance is explained by an energy band diagram including trap models. The activation energy is obtained by the depression curve of the samples with different annealing temperatures to better understand the switching mechanism. Moreover, our results reveal that the annealing temperature and retention can affect the linearity of potentiation and depression. Finally, we investigate the effect of the annealing temperature on the recognition rate of MNIST in the proposed neural network.

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In this study, the homojunction thin-film transistors (TFTs) with amorphous indium gallium zinc oxide (a-IGZO) as active channel layers and source/drain electrodes were fabricated by RF magnetron sputtering. The effect of oxygen partial pressure on the phase, microstructure, optical and electrical properties of IGZO thin films was investigated. The results showed that amorphous IGZO thin films always exhibit a high transmittance above 90% and wide band gaps of around 3.9 eV. The resistivity increases as the IGZO thin films are deposited at a higher oxygen partial pressure due to the depletion of oxygen vacancies. In addition, the electrical behaviors in homojunction IGZO TFTs were analyzed. When the active channel layers were deposited with an oxygen partial pressure of 1.96%, the homojunction IGZO TFTs exhibited optimal transfer and output characteristics with a field-effect mobility of 13.68 cm2V-1s-1. Its sub-threshold swing, threshold voltage and on/off ratio are 0.6 V/decade, 0.61 V and 107, respectively.

RESUMEN

A kind of ultra-thin transmissive color filter based on a metal-semiconductor-metal (MSM) structure is proposed. The displayed color can cover the entire visible range and switches after H2 treatment. An indium gallium zinc oxide (IGZO) semiconductor was employed, as the concentration of charge carriers can be controlled to adjust the refractive index and achieve certain colors. The color modulation in the designed structure was verified using the rigorous coupled wave analysis (RCWA) method. The angular independence of the relative transmission could reach up to 60°, and polarization-insensitive performance could also be maintained. Numerical results demonstrated that the thickness of IGZO was the key parameter to concentrate the incident light. The overall structure is planar and lithography-free and can be produced with simple preparation steps. The obtained results can also be extended to other similar resonators where a proper cavity allows dynamical functionality.

RESUMEN

Thin-film transistors using metal oxide semiconductors are essential in many unconventional electronic devices. Nevertheless, further advances will be necessary to broaden their technological appeal. Here, a new strategy is reported to achieve high-performance solution-processed metal oxide thin-film transistors (MOTFTs) by introducing a metallic micro-island array (M-MIA) on top of the MO back channel, where the MO is a-IGZO (amorphous indium-gallium-zinc-oxide). Here Al-MIAs are fabricated using honeycomb cinnamate cellulose films, created by a scalable breath-figure method, as a shadow mask. For IGZO TFTs, the electron mobility (µe ) increases from ≈3.6 cm2 V-1 s-1 to near 15.6 cm2 V-1 s-1 for optimal Al-MIA dimension/coverage of 1.25 µm/51%. The Al-MIA IGZO TFT performance is superior to that of controls using compact/planar Al layers (Al-PL TFTs) and Au-MIAs with the same channel coverage. Kelvin probe force microscopy and technology computer-aided design simulations reveal that charge transfer occurs between the Al and the IGZO channel which is optimized for specific Al-MIA dimensions/surface channel coverages. Furthermore, such Al-MIA IGZO TFTs with a high-k fluoride-doped alumina dielectric exhibit a maximum µe of >50.2 cm2 V-1 s-1 . This is the first demonstration of a micro-structured MO semiconductor heterojunction with submicrometer resolution metallic arrays for enhanced transistor performance and broad applicability to other devices.

RESUMEN

In this study, indium-gallium-zinc oxide (IGZO)-decorated ZnO thin films were investigated through the change in IGZO deposition time for the detection of NO2 gas. The atomic layer deposited ZnO on interdigitated Au electrode alumina substrates are decorated with IGZO by controlling the deposition time. The IGZO (ZnO:Ga2O3:In2O3 = 1:1:1 mol. %) polycrystalline target was used for deposition and effect of deposition time was investigated. The sensor responses (Rgas/Rair) of 20.6, 39.3, and 57.1 and 45.2, 102.5, and 243.5 were obtained at 150 °C, 200 °C, and 250 °C and 25-ppm NO2 concentration for ZnO (Z1) and IGZO-decorated ZnO (Z3) films, respectively. The sensor response (Rgas/Rair) increased from ∼27 to 243.5 by decorating the ZnO film with IGZO for a 60-s sputtering time. The sensor recovery and response times of the IGZO-decorated ZnO/ZnO sensor increased, and the sensor selectivity to different gases was also evaluated.

Asunto(s)

RESUMEN

The low-temperature poly-Si oxide (LTPO) backplane is realized by monolithically integrating low-temperature poly-Si (LTPS) and amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) in the same display backplane. The LTPO-enabled dynamic refreshing rate can significantly reduce the display's power consumption. However, the essential hydrogenation of LTPS would seriously deteriorate AOS TFTs by increasing the population of channel defects and carriers. Hydrogen (H) diffusion barriers were comparatively investigated to reduce the H content in amorphous indium-gallium-zinc oxide (a-IGZO). Moreover, the intrinsic H-resistance of a-IGZO was impressively enhanced by plasma treatments, such as fluorine and nitrous oxide. Enabled by the suppressed H conflict, a novel AOS/LTPS integration structure was tested by directly stacking the H-resistant a-IGZO on poly-Si TFT, dubbed metal-oxide-on-Si (MOOS). The noticeably shrunken layout footprint could support much higher resolution and pixel density for next-generation displays, especially AR and VR displays. Compared to the conventional LTPO circuits, the more compact MOOS circuits exhibited similar characteristics.

RESUMEN

Amorphous indium-gallium-zinc oxide (a-IGZO) has become a standard channel ingredient of switching/driving transistors in active-matrix organic light-emitting diode (AMOLED) televisions. However, mobile AMOLED displays with a high pixel density (≥500 pixels per inch) and good form factor do not often employ a-IGZO transistors due to their modest mobility (10-20 cm2/(V s)). Hybrid low-temperature polycrystalline silicon and oxide transistor (LTPO) technology is being adapted in high-end mobile AMOLED devices due to its ultralow power consumption and excellent current drivability. The critical issues of LTPO (including a complicated structure and high fabrication costs) require a search for alternative all-oxide thin-film transistors (TFTs) with low-cost processability and simple device architecture. The atomic layer deposition (ALD) method is a promising route for high-performance all-oxide TFTs due to its unique features, such as in situ cation composition tailoring ability, precise nanoscale thickness controllability, and excellent step coverage. Here, we report an in-depth comparative investigation of TFTs with indium-gallium oxide (IGO)/gallium-zinc oxide (GZO) and indium-zinc oxide (IZO)/GZO heterojunction stacks using an ALD method. IGO and IZO layers with different compositions were tested as a confinement layer (CL), whereas the GZO layer was used as a barrier layer (BL). Optimal IGO/GZO and IZO/GZO channels were carefully designed on the basis of their energy band properties, where the formation of a quasi-two-dimensional electron gas (q2DEG) near the CL/BL interface is realized by rational design of the band gaps and work-functions of the IGO, IZO, and GZO thin films. To verify the effect of q2DEG formation, the device performances and stabilities of TFTs with CL/BL oxide heterojunction stacks were examined and compared to those of TFTs with a single CL layer. The optimized device with the In0.75Zn0.25O/Ga0.80Zn0.20O stack showed remarkable electrical performance: µFE of 76.7 ± 0.51 cm2/(V s), VTH of -0.37 ± 0.19 V, SS of 0.13 ± 0.01 V/dec, and ION/OFF of 2.5 × 1010 with low operation voltage range of ≥2 V and excellent stabilities (ΔVTH of +0.35, -0.67, and +0.08 V for PBTS, NBIS, and CCS, respectively). This study suggests the feasibility of using high-performance ALD-derived oxide TFTs (which can compete with the performance of LTPO transistors) for high-end mobile AMOLED displays.