RESUMEN
The von Neumann architecture has faced challenges requiring high-fulfillment levels due to the performance gap between its processor and memory. Among the numerous resistive-switching random-access memories, the properties of hexagonal boron nitride (BN) have been extensively reported, but those of amorphous BN have been insufficiently explored for memory applications. Herein, we fabricated a Pt/BN/TiN device utilizing the resistive switching mechanism to achieve synaptic characteristics in a neuromorphic system. The switching mechanism is investigated based on the I-V curves. Utilizing these characteristics, we optimize the potentiation and depression to mimic the biological synapse. In artificial neural networks, high-recognition rates are achieved using linear conductance updates in a memristor device. The short-term memory characteristics are investigated in depression by controlling the conductance level and time interval.
RESUMEN
In this work, we analyze a resistive switching random access memory (RRAM) device with the metal-insulator-metal structure of Al/αTiOx/Al. The transport mechanism of our RRAM device is trap-controlled space-charge limited conduction, which does not change during the endurance test. As the number of resistive switching (RS) cycles increases, the current in the low-resistance state (LRS) does not change significantly. In contrast, degradation in the high-resistance state (HRS) is noticeably evident. According to the RS cycle, the current shift fits well with the stretched-exponential equation. The normalized noise power spectral density (Si/I2) measured in the HRS is an order of magnitude higher than that in the LRS owing to the difference in the degree of trap occupancy, which is responsible for the transition of resistance states. During the consecutive RS, the Si/I2 in the HRS rapidly decreases for approximately 100 cycles and then saturates. In contrast, in the LRS, the Si/I2 does not change significantly. Here we propose a model associated with the endurance degradation of the experimental device, and the model is verified with a 1/f noise measurement.
RESUMEN
A three-terminal synaptic transistor enables more accurate controllability over the conductance compared with traditional two-terminal synaptic devices for the synaptic devices in hardware-oriented neuromorphic systems. In this work, we fabricated IGZO-based three-terminal devices comprising HfAlOx and CeOx layers to demonstrate the synaptic operations. The chemical compositions and thicknesses of the devices were verified by transmission electron microscopy and energy dispersive spectroscopy in cooperation. The excitatory post-synaptic current (EPSC), paired-pulse facilitation (PPF), short-term potentiation (STP), and short-term depression (STD) of the synaptic devices were realized for the short-term memory behaviors. The IGZO-based three-terminal synaptic transistor could thus be controlled appropriately by the amplitude, width, and interval time of the pulses for implementing the neuromorphic systems.
RESUMEN
In this work, the sputtered deposited WOx/TaOx switching layer has been studied for resistive random-access memory (RRAM) devices. Gradual SET and RESET behaviors with reliable device-to-device variability were obtained with DC voltage sweep cycling without an electroforming process. The memristor shows uniform switching characteristics, low switching voltages, and a high RON/ROFF ratio (~102). The transition from short-term plasticity (STP) to long-term potentiation (LTP) can be observed by increasing the pulse amplitude and number. Spike-rate-dependent plasticity (SRDP) and paired-pulse facilitation (PPF) learning processes were successfully emulated by sequential pulse trains. By reducing the pulse interval, the synaptic weight change increases due to the residual oxygen vacancy near the conductive filaments (CFs). This work explores mimicking the biological synaptic behavior and further development for next-generation neuromorphic applications.
RESUMEN
ITO/WOx/TaN and ITO/WOx/AlOx/TaN memory cells were fabricated as a neuromorphic device that is compatible with CMOS. They are suitable for the information age, which requires a large amount of data as next-generation memory. The device with a thin AlOx layer deposited by atomic layer deposition (ALD) has different electrical characteristics from the device without an AlOx layer. The low current is achieved by inserting an ultra-thin AlOx layer between the switching layer and the bottom electrode due to the tunneling barrier effect. Moreover, the short-term memory characteristics in bilayer devices are enhanced. The WOx/AlOx device returns to the HRS without a separate reset process or energy consumption. The amount of gradual current reduction could be controlled by interval time. In addition, it is possible to maintain LRS for a longer time by forming it to implement long-term memory.
RESUMEN
In this study, we investigate the synaptic characteristics and the non-volatile memory characteristics of TiN/CeOx/Pt RRAM devices for a neuromorphic system. The thickness and chemical properties of the CeOx are confirmed through TEM, EDS, and XPS analysis. A lot of oxygen vacancies (ions) in CeOx film enhance resistive switching. The stable bipolar resistive switching characteristics, endurance cycling (>100 cycles), and non-volatile properties in the retention test (>10,000 s) are assessed through DC sweep. The filamentary switching model and Schottky emission-based conduction model are presented for TiN/CeOx/Pt RRAM devices in the LRS and HRS. The compliance current (1~5 mA) and reset stop voltage (−1.3~−2.2 V) are used in the set and reset processes, respectively, to implement multi-level cell (MLC) in DC sweep mode. Based on neural activity, a neuromorphic system is performed by electrical stimulation. Accordingly, the pulse responses achieve longer endurance cycling (>10,000 cycles), MLC (potentiation and depression), spike-timing dependent plasticity (STDP), and excitatory postsynaptic current (EPSC) to mimic synapse using TiN/CeOx/Pt RRAM devices.
RESUMEN
We fabricated an ITO/ZnO/TaON/TaN device as nonvolatile memory (NVM) with resistive switching for complementary metal-oxide-semiconductor (CMOS) compatibility. It is appropriate for the age of big data, which demands high speed and capacity. We produced a TaON layer by depositing a ZnO layer on a TaN layer using an oxygen-reactive radio frequency (RF) sputtering system. The bi-layer formation of ZnO and TaON interferes with the filament rupture after the forming process and then raises the current level slightly. The current levels were divided into high- and low-compliance modes. The retention, endurance, and pulse conductance were verified with a neuromorphic device. This device was stable and less consumed when it was in low mode rather than high mode.