Design and construction of the high-speed optoelectronic memory system demonstrator.

Barbieri, Roberto; Benabes, Philippe; Bierhoff, Thomas; Caswell, Josh J; Gauthier, Alain; Jahns, Jürgen; Jarczynski, Manfred; Lukowicz, Paul; Oksman, Jacques; Russell, Gordon A; Schrage, Jürgen; Snowdon, John F; Stübbe, Oliver; Troster, Gerhard; Wirz, Marco

Barbieri, Roberto; Benabes, Philippe; Bierhoff, Thomas; Caswell, Josh J; Gauthier, Alain; Jahns, Jürgen; Jarczynski, Manfred; Lukowicz, Paul; Oksman, Jacques; Russell, Gordon A; Schrage, Jürgen; Snowdon, John F; Stübbe, Oliver; Troster, Gerhard; Wirz, Marco.

Afiliación

Barbieri R; Heriot-Watt University, Riccarton, Edinburgh, UK.

Appl Opt ; 47(19): 3500-12, 2008 Jul 01.

Article en En | MEDLINE | ID: mdl-18594597

RESUMEN

The high-speed optoelectronic memory system project is concerned with the reduction of latency within multiprocessor computer systems (a key problem) by the use of optoelectronics and associated packaging technologies. System demonstrators have been constructed to enable the evaluation of the technologies in terms of manufacturability. The system combines fiber, free space, and planar integrated optical waveguide technologies to augment the electronic memory and the processor components. Modeling and simulation techniques were developed toward the analysis and design of board-integrated waveguide transmission characteristics and optical interfacing. We describe the fabrication, assembly, and simulation of the major components within the system.

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Colección: 01-internacional Base de datos: MEDLINE Tipo de estudio: Prognostic_studies Idioma: En Revista: Appl Opt Año: 2008 Tipo del documento: Article Pais de publicación: Estados Unidos

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