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This paper presents an innovative approach for predicting timing errors tailored to near-/sub-threshold operations, addressing the energy-efficient requirements of digital circuits in applications, such as IoT devices and wearables. The method involves assessing deep path activity within an adjustable window prior to the root clock's rising edge. By dynamically adapting the prediction window and supply voltage based on error detection outcomes, the approach effectively mitigates false predictions-an essential concern in low-voltage prediction techniques. The efficacy of this strategy is demonstrated through its implementation in a near-/sub-threshold 32-bit microprocessor system. The approach incurs only a modest 6.84% area overhead attributed to well-engineered lightweight design methodologies. Furthermore, with the integration of clock gating, the system functions seamlessly across a voltage range of 0.4 V-1.2 V (5-100 MHz), effectively catering to adaptive energy efficiency. Empirical results highlight the potential of the proposed strategy, achieving a significant 46.95% energy reduction at the Minimum Energy Point (MEP, 15 MHz) compared to signoff margins. Additionally, a 19.75% energy decrease is observed compared to the zero-margin operation, demonstrating successful realization of negative margins.
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Photovoltaic (PV) systems are crucial to the production of electricity for a newly established community in Egypt, especially in grid-tied systems. Power quality (PQ) issues appear as a result of PV connection with the power grid (PG). PQ problems cause the PG to experience faults and harmonics, which affect consumers. A series compensator dynamic voltage restorer (DVR) is the most affordable option for resolving the abovementioned PQ problems. To address PQ difficulties, this paper describes a grid-tied PV combined with a DVR that uses a rotating dq reference frame (dqRF) controller. The main goal of this study is to apply and construct an effective PI controller for a DVR to mitigate PQ problems. The artificial rabbits optimization (ARO) is used to obtain the best tune of the PI controller. The obtained results are compared with five optimization techniques (L-SHADE, CMAES, WOA, PSO, and GWO) to show its impact and effectiveness. Additionally, Lyapunov's function is used to analyze and evaluate the proposed controller stability. Also, a mathematical analysis of the investigated PV, boost converter, and rotating dqRF control is performed. Two fault test scenarios are examined to confirm the efficacy of the suggested control approach. The parameters' (voltage, current, and power) waveforms for the suggested system are improved, and the system is kept running continuously under fault periods, which improves the performance of the system. Moreover, the findings demonstrate that the presented design successfully keeps the voltage at the required level with low THD% values at the load side according to the IEEE standards and displays a clear enhancement in voltage waveforms. The MATLAB/SIMULINK software is used to confirm the proposed system's performance.
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The dynamic voltage is a unique phenomenon of superconducting materials. It arises when the superconductor is carrying a DC transport current and spontaneously in subject to an AC magnetic field. This study excavates the aspects that previous studies have not comprehensively investigated: the dynamic voltage in a DC-carrying superconducting tape exposed to different oscillating AC magnetic fields. First, the fundamental physics of dynamic voltage/flux of superconductors is reviewed and further analysed in detail. We used the superconducting modelling method using the H-formulation merged into the finite-element method (FEM) software, to re-produce the typical dynamic voltage behaviour of a superconducting tape. The modelling was verified by both the analytical and experimental results, in order to precisely prove the reliability of the modelling. Afterwards, the modelling was performed for a DC-carrying superconducting tape under four different oscillating magnetic fields (sine, triangle, sawtooth and square), and their corresponding dynamic voltages and energy losses were analysed and compared. Results show the sinusoidal magnetic field can lead to the optimal combination of reasonable dynamic voltage but relatively lower loss, which is suitable for those superconducting applications requiring dynamic voltage as the energy source, e.g., flux pumps. This article presents novel investigation and analysis of the dynamic voltage in superconducting materials, and both the methodology and results can provide useful information for the future design/analysis of superconducting applications with DC transport currents and AC magnetic fields.
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With the advancement of technology, electric equipment and loads have become more sensitive to problems related to power quality, such as voltage sag, swell, imbalances, and harmonics. To detect faults and to protect sensitive loads from these voltage distortions, a Dynamic Voltage Restorer (DVR) series compensator is among the best available cost-effective solutions. One of the main goals of the DVR is to achieve a control structure that is robust, stable, and can handle properly the disturbances (e.g., grid voltage issues, load current, and fluctuations at the DC link voltage) and model uncertainties (e.g., inverters and filter parameters). In this work, a novel framework control strategy based on Uncertainty and Disturbance Estimator (UDE) is proposed to improve the response of the DVR to properly compensate the load voltage under a variety of power quality issues, particularly the ones associated with the grid voltage disturbances. Additionally, the stability of the proposed control system is analyzed and validated using the Lyapunov stability theory. The advantages of the new control system are robustness, simplified design, good harmonic rejection, low tracking error, fast response, and sinusoidal reference tracking without the need for voltage transformations or specific frequency tuning (e.g., abc-dq0 and Proportional-Resonant). This research uses the MATLAB/Simulink software to validate the effectiveness of the proposed scheme under a diverse set of conditions with no control limitations. Moreover, the designed controller is tested under real conditions using Hardware-In-the-Loop (HIL) validation with OPAL-RT real-time simulator coupled with a TI Launchpad microcontroller. The results demonstrate a good performance of the proposed control strategy for a quick transient response and a great harmonic rejection when subject to grid voltage distortions.
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In this paper, an incorporated bridge-type superconducting fault current limiter (BSFCL) and Dynamic Voltage Restorer (DVR) is presented to improve the voltage quality and limiting fault current problems in distribution systems. In order to achieve these capabilities, the BSFCL and DVR are integrated through a common DC link as a BSFCL-DVR system. The FCL and DVR ports of the BSFCL-DVR system are located in the beginning and end of the sensitive loads' feeder integrated to the point of common coupling (PCC) in the distribution system. At first, the principle operation of the BSFCL-DVR is discussed. Then, a control system for the BSFCL-DVR system is designed to enhance the voltage quality and limit the fault current. Eventually, the efficiency of the BSFCL-DVR system is verified through the PSCAD/EMTDC simulation.
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Recently, thanks to the miniaturization and high performance of commercial-off-the-shelf(COTS) computer systems, small satellites get popular. However, due to the very expensive launchingcost, it is critical to reduce the physical size and weight of the satellite systems such as cube satellites(CubeSats), making it infeasible to install high capacity batteries or solar panels. Thus, the low-powerdesign is one of the most critical issues in the design of such systems. In addition, as satellitesmake a periodic revolution around the Earth in a vacuum, their operating temperature varies greatly.For instance, in a low earth orbit (LEO) CubeSats, the temperatures vary from 30 to -30 degreesCelsius, resulting in a big thermal cycle (TC) in the electronic parts that is known to be one of themost critical reliability threats. Moreover, such LEO CubeSats are not fully protected by activethermal control and thermal insulation due to the cost, volume, and weight problems. In thispaper, we propose to utilize temperature sensors to maximize the lifetime reliability of the LEOsatellite systems via multi-core mapping and dynamic voltage and frequency scaling (DVFS) underpower constraint. As conventional reliability enhancement techniques primarily focus on reducingthe temperature, it may cause enlarged TCs, making them even less reliable. On the contrary,we try to maintain the TC optimal in terms of reliability with respect to the given power constraint.Experimental evaluation shows that the proposed technique improves the expected lifetime of thesatellite embedded systems by up to 8.03 times in the simulation of Nvidia's Jetson TK1.
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A power-saving approach for real-time systems that combines processor voltage scaling and task placement in hybrid memory is presented. The proposed approach incorporates the task's memory placement problem between the DRAM (dynamic random access memory) and NVRAM (nonvolatile random access memory) into the task model of the processor's voltage scaling and adopts power-saving techniques for processor and memory selectively without violating the deadline constraints. Unlike previous work, our model tightly evaluates the worst-case execution time of a task, considering the time delay that may overlap between the processor and memory, thereby reducing the power consumption of real-time systems by 18-88%.
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This paper presents a novel contribution of a low complexity control scheme for voltage control of a dynamic voltage restorer (DVR). The scheme proposed utilizes an error-driven proportional-integral-derivative (PID) controller to guarantee better power quality performance in terms of voltage enhancement and stabilization of the buses, energy efficient utilization, and harmonic distortion reduction in a distribution network. This method maintains the load voltage close to or equal to the nominal value in terms of various voltage disturbances such as balanced and unbalanced sag/swell, voltage imbalance, notching, different fault conditions as well as power system harmonic distortion. A grasshopper optimization algorithm (GOA) is used to tune the gain values of the PID controller. In order to validate the effectiveness of the proposed DVR controller, first, a fractional order PID controller was presented and compared with the proposed one. Further, a comparative performance evaluation of four optimization techniques, namely Cuckoo search (CSA), GOA, Flower pollination (FBA), and Grey wolf optimizer (GWO), is presented to compare between the PID and FOPID performance in terms of fault conditions in order to achieve a global minimum error and fast dynamic response of the proposed controller. Second, a comparative analysis of simulation results obtained using the proposed controller and those obtained using an active disturbance rejection controller (ADRC) is presented, and it was found that the performance of the optimal PID is better than the performance of the conventional ADRC. Finally, the effectiveness of the presented DVR with the controller proposed has been assessed by time-domain simulations in the MATLAB/Simulink platform.
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Dynamic voltage and frequency scaling (DVFS) is a well-known method for saving energy consumption. Several DVFS studies have applied learning-based methods to implement the DVFS prediction model instead of complicated mathematical models. This paper proposes a lightweight learning-directed DVFS method that involves using counter propagation networks to sense and classify the task behavior and predict the best voltage/frequency setting for the system. An intelligent adjustment mechanism for performance is also provided to users under various performance requirements. The comparative experimental results of the proposed algorithms and other competitive techniques are evaluated on the NVIDIA JETSON Tegra K1 multicore platform and Intel PXA270 embedded platforms. The results demonstrate that the learning-directed DVFS method can accurately predict the suitable central processing unit (CPU) frequency, given the runtime statistical information of a running program, and achieve an energy savings rate up to 42%. Through this method, users can easily achieve effective energy consumption and performance by specifying the factors of performance loss.
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In sensory swarms, minimizing energy consumption under performance constraint is one of the key objectives. One possible approach to this problem is to monitor application workload that is subject to change at runtime, and to adjust system configuration adaptively to satisfy the performance goal. As today's sensory swarms are usually implemented using multi-core processors with adjustable clock frequency, we propose to monitor the CPU workload periodically and adjust the task-to-core allocation or clock frequency in an energy-efficient way in response to the workload variations. In doing so, we present an online heuristic that determines the most energy-efficient adjustment that satisfies the performance requirement. The proposed method is based on a simple yet effective energy model that is built upon performance prediction using IPC (instructions per cycle) measured online and power equation derived empirically. The use of IPC accounts for memory intensities of a given workload, enabling the accurate prediction of execution time. Hence, the model allows us to rapidly and accurately estimate the effect of the two control knobs, clock frequency adjustment and core allocation. The experiments show that the proposed technique delivers considerable energy saving of up to 45%compared to the state-of-the-art multi-core energy management technique.
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Fault ride through (FRT) capability in wind turbines to maintain the grid stability during faults has become mandatory with the increasing grid penetration of wind energy. Doubly fed induction generator based wind turbine (DFIG-WT) is the most popularly utilized type of generator but highly susceptible to the voltage disturbances in grid. Dynamic voltage restorer (DVR) based external FRT capability improvement is considered. Since DVR is capable of providing fast voltage sag mitigation during faults and can maintain the nominal operating conditions for DFIG-WT. The effectiveness of the DVR using Synchronous reference frame (SRF) control is investigated for FRT capability in DFIG-WT during both balanced and unbalanced fault conditions. The operation of DVR is confirmed using time-domain simulation in MATLAB/Simulink using 1.5MW DFIG-WT.
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Ion channels constitute a superfamily of membrane proteins found in all living creatures. Their activity allows fast translocation of ions across the plasma membrane down the ion's transmembrane electrochemical gradient, resulting in a difference in electrical potential across the plasma membrane, known as the membrane potential. A group within this superfamily, namely voltage-gated channels, displays activity that is sensitive to the membrane potential. The activity of voltage-gated channels is controlled by the membrane potential, while the membrane potential is changed by these channels' activity. This interplay produces variations in the membrane potential that have evolved into electrical signals in many organisms. These signals are essential for numerous biological processes, including neuronal activity, insulin release, muscle contraction, fertilization and many others. In recent years, the activity of the voltage-gated channels has been observed not to follow a simple relationship with the membrane potential. Instead, it has been shown that the activity of voltage-gated channel displays hysteresis. In fact, a growing number of evidence have demonstrated that the voltage dependence of channel activity is dynamically modulated by activity itself. In spite of the great impact that this property can have on electrical signaling, hysteresis in voltage-gated channels is often overlooked. Addressing this issue, this review provides examples of voltage-gated ion channels displaying hysteretic behavior. Further, this review will discuss how Dynamic Voltage Dependence in voltage-gated channels can have a physiological role in electrical signaling. Furthermore, this review will elaborate on the current thoughts on the mechanism underlying hysteresis in voltage-gated channels.
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Canales Iónicos/metabolismo , Potenciales de la Membrana , Animales , Humanos , Modelos Biológicos , Transducción de Señal , TermodinámicaRESUMEN
Voltage sags can be symmetrical or unsymmetrical depending on the causes of the sag. At the present time, one of the most common procedures for mitigating voltage sags is by the use of dynamic voltage restorers (DVRs). By definition, a DVR is a controlled voltage source inserted between the network and a sensitive load through a booster transformer injecting voltage into the network in order to correct any disturbance affecting a sensitive load voltage. In this paper, modelling of DVR for voltage correction using MatLab software is presented. The performance of the device under different voltage sag types is described, where the voltage sag types are introduced using the different types of short-circuit faults included in the environment of the MatLab/Simulink package. The robustness of the proposed device is evaluated using the common voltage sag indices, while taking into account voltage and current unbalance percentages, where maintaining the total harmonic distortion percentage of the load voltage within a specified range is desired. Finally, several simulation results are shown in order to highlight that the DVR is capable of effective correction of the voltage sag while minimizing the grid voltage unbalance and distortion, regardless of the fault type.