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The resistivity scaling of Cu electrical interconnects represents a critical challenge in Si CMOS technology. As interconnect dimensions reach below 10 nm, Cu resistivity increases significantly due to surface scattering. Topological materials have been considered for application in ultra-scaled interconnects (below 5 nm), due to their topologically protected surface states that have reduced electron scattering. Recent theoretical work on the topological chiral semimetal CoSi suggests that this material could offer lower resistivity than Cu at dimensions smaller than 10 nm. Here we investigate the scaling trend of textured and amorphous CoSi thin films, deposited by molecular beam epitaxy in a thickness range between 2 and 82.5 nm. Contrary to predictions of standard resistivity models, we report here a reduction in resistivity for thin amorphous CoSi films, which is instead consistent with surface-dominated transport. Moreover, magnetotransport measurements reveal significant enhancement of the magnetoresistance in scaled films, highlighting the complex transport mechanisms present in these highly disordered films at thicknesses of a few nanometers.
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The chiral anomaly - a hallmark of chiral spin-1/2 Weyl fermions - is an imbalance between left- and right-moving particles that underpins phenomena such as particle decay and negative longitudinal magnetoresistance in Weyl semimetals. The discovery that chiral crystals can host higher-spin generalizations of Weyl quasiparticles without high-energy counterparts, known as multifold fermions, raises the fundamental question of whether the chiral anomaly is a more general phenomenon. Answering this question requires materials with chiral quasiparticles within a sizable energy window around the Fermi level that are unaffected by extrinsic effects such as current jetting. Here, we report the chiral anomaly of multifold fermions in CoSi, which features multifold bands within ~0.85 eV of the Fermi level. By excluding current jetting through the squeezing test, we measure an intrinsic, longitudinal negative magnetoresistance. We develop a semiclassical theory to show that the negative magnetoresistance originates in the chiral anomaly, despite a sizable and detrimental orbital magnetic moment contribution. A concomitant non-linear Hall effect supports the multifold-fermion origin of the magnetotransport. Our work confirms the chiral anomaly of higher-spin generalizations of Weyl fermions, currently inaccessible outside solid-state platforms.
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Photonic integrated circuits are paving the way for novel on-chip functionalities with diverse applications in communication, computing, and beyond. The integration of on-chip light sources, especially single-mode lasers, is crucial for advancing those photonic chips to their full potential. Recently, novel concepts involving topological designs introduced a variety of options for tuning device properties, such as the desired single-mode emission. Here, we introduce a novel cavity design that allows amplification of the topological interface mode by deterministic placement of gain material within a topological lattice. The proposed design is experimentally implemented by a selective epitaxy process to achieve closely spaced Si and InGaAs nanorods embedded within the same layer. This results in the first demonstration of a single-mode laser in the telecom band using the concept of amplified topological modes without introducing artificial losses.
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We demonstrate the selective area growth of InGaAs nanowires (NWs) on GaAs (111)B substrates using hydride vapor phase epitaxy (HVPE). A high growth rate of more than 50µm h-1and high aspect ratio NWs were obtained. Composition along the NWs was investigated by energy dispersive x-ray spectroscopy giving an average indium composition of 84%. This is consistent with the composition of 78% estimated from the photoluminescence spectrum of the NWs. Crystal structure analysis of the NWs by transmission electron microscopy indicated random stacking faults related to zinc-blende/wurtzite polytypism. This work demonstrates the ability of HVPE for growing high aspect ratio InGaAs NW arrays.
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Semiconductor transistors operate by modulating the charge carrier concentration of a channel material through an electric field coupled by a capacitor. This mechanism is constrained by the fundamental transport physics and material properties of such devices-attenuation of the electric field, and limited mobility and charge carrier density in semiconductor channels. In this work, we demonstrate a new type of transistor that operates through a different mechanism. The channel material is a Weyl semimetal, NbP, whose resistivity is modulated via a magnetic field generated by an integrated superconductor. Due to the exceptionally large electron mobility of this material, which reaches over 1,000,000 cm2/Vs, and the strong magnetoresistive coupling, the transistor can generate significant transconductance amplification at nanowatt levels of power. This type of device can enable new low-power amplifiers, suitable for qubit readout operation in quantum computers.
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In recent times the chiral semimetal cobalt monosilicide (CoSi) has emerged as a prototypical, nearly ideal topological conductor hosting giant, topologically protected Fermi arcs. Exotic topological quantum properties have already been identified in CoSi bulk single crystals. However, CoSi is also known for being prone to intrinsic disorder and inhomogeneities, which, despite topological protection, risk jeopardizing its topological transport features. Alternatively, topology may be stabilized by disorder, suggesting the tantalizing possibility of an amorphous variant of a topological metal, yet to be discovered. In this respect, understanding how microstructure and stoichiometry affect magnetotransport properties is of pivotal importance, particularly in case of low-dimensional CoSi thin films and devices. Here we comprehensively investigate the magnetotransport and magnetic properties of ≈25 nm Co1-xSix thin films grown on a MgO substrate with controlled film microstructure (amorphous vs textured) and chemical composition (0.40 < x < 0.60). The resistivity of Co1-xSix thin films is nearly insensitive to the film microstructure and displays a progressive evolution from metallic-like (dρxx/dT > 0) to semiconducting-like (dρxx/dT < 0) regimes of conduction upon increasing the silicon content. A variety of anomalies in the magnetotransport properties, comprising for instance signatures consistent with quantum localization and electron-electron interactions, anomalous Hall and Kondo effects, and the occurrence of magnetic exchange interactions, are attributable to the prominent influence of intrinsic structural and chemical disorder. Our systematic survey brings to attention the complexity and the challenges involved in the prospective exploitation of the topological chiral semimetal CoSi in nanoscale thin films and devices.
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The idea of benefitting from the properties of III-V semiconductors and silicon on the same substrate has been occupying the minds of scientists for several years. Although the principle of III-V integration on a silicon-based platform is simple, it is often challenging to perform due to demanding requirements for sample preparation rising from a mismatch in physical properties between those semiconductor groups (e.g. different lattice constants and thermal expansion coefficients), high cost of device-grade materials formation and their post-processing. In this paper, we demonstrate the deposition of group-III metal and III-V semiconductors in microfabricated template structures on silicon as a strategy for heterogeneous device integration on Si. The metal (indium) is selectively electrodeposited in a 2-electrode galvanostatic configuration with the working electrode (WE) located in each template, resulting in well-defined In structures of high purity. The semiconductors InAs and InSb are obtained by vapour phase diffusion of the corresponding group-V element (As, Sb) into the liquified In confined in the template. We discuss in detail the morphological and structural characterization of the synthesized In, InAs and InSb crystals as well as chemical analysis through scanning electron microscopy (SEM), scanning transmission electron microscopy (TEM/STEM), and energy-dispersive X-ray spectroscopy (EDX). The proposed integration path combines the advantage of the mature top-down lithography technology to define device geometries and employs economic electrodeposition (ED) and vapour phase processes to directly integrate difficult-to-process materials on a silicon platform.
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An important building block for on-chip photonic applications is a scaled emitter. Whispering gallery mode cavities based on III-Vs on Si allow for small device footprints and lasing with low thresholds. However, multimodal emission and wavelength stability over a wider range of temperature can be challenging. Here, we explore the use of Au nanorod antennae on InP whispering gallery mode lasers on Si for single-mode emission. We show that by proper choice of the antenna size and positioning, we can suppress the side modes of a cavity and achieve single-mode emission over a wide excitation range. We establish emission trends by varying the size of the antenna and show that the far-field radiation pattern differs significantly for devices with and without antenna. Furthermore, the antenna-induced single-mode emission is dominant from room temperature (300 K) down to 200 K, whereas the cavity without an antenna is multimodal and its dominant emission wavelength is highly temperature-dependent.
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The seamless integration of III-V nanostructures on silicon is a long-standing goal and an important step towards integrated optical links. In the present work, we demonstrate scaled and waveguide coupled III-V photodiodes monolithically integrated on Si, implemented as InP/In0.5Ga0.5As/InP p-i-n heterostructures. The waveguide coupled devices show a dark current down to 0.048 A/cm2 at -1 V and a responsivity up to 0.2 A/W at -2 V. Using grating couplers centered around 1320 nm, we demonstrate high-speed detection with a cutoff frequency f3dB exceeding 70 GHz and data reception at 50 GBd with OOK and 4PAM. When operated in forward bias as a light emitting diode, the devices emit light centered at 1550 nm. Furthermore, we also investigate the self-heating of the devices using scanning thermal microscopy and find a temperature increase of only ~15 K during the device operation as emitter, in accordance with thermal simulation results.
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Integration of high-quality semiconductor-superconductor devices into scalable and complementary metal-oxide-semiconductor compatible architectures remains an outstanding challenge, currently hindering their practical implementation. Here, we demonstrate growth of InAs nanowires monolithically integrated on Si inside lateral cavities containing superconducting TiN elements. This technique allows growth of hybrid devices characterized by sharp semiconductor-superconductor interfaces and with alignment along arbitrary crystallographic directions. Electrical characterization at low temperature reveals proximity induced superconductivity in InAs via a transparent interface.
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As conductors in electronic applications shrink, microscopic conduction processes lead to strong deviations from Ohm's law. Depending on the length scales of momentum conserving (lMC) and relaxing (lMR) electron scattering, and the device size (d), current flows may shift from ohmic to ballistic to hydrodynamic regimes. So far, an in situ methodology to obtain these parameters within a micro/nanodevice is critically lacking. In this context, we exploit Sondheimer oscillations, semi-classical magnetoresistance oscillations due to helical electronic motion, as a method to obtain lMR even when lMR â« d. We extract lMR from the Sondheimer amplitude in WP2, at temperatures up to T ~ 40 K, a range most relevant for hydrodynamic transport phenomena. Our data on µm-sized devices are in excellent agreement with experimental reports of the bulk lMR and confirm that WP2 can be microfabricated without degradation. These results conclusively establish Sondheimer oscillations as a quantitative probe of lMR in micro-devices.
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High-performance electronics would greatly benefit from a versatile III-V integration process on silicon. Unfortunately, integration using hetero epitaxy is hampered by polarity, lattice, and thermal expansion mismatch. This work proposes an alternative concept of III-V integration combining advantages of pulse electrodeposition, template-assisted selective epitaxy, and recrystallization from a melt. Efficient electrodeposition of nano-crystalline and stochiometric InSb in planar templates on Si (001) is achieved. The InSb deposits are analysed by high resolution scanning transmission electron microscopy (HR-STEM) and energy-dispersive X-ray spectroscopy (EDX) before and after melting and recrystallization. The results show that InSb can crystallise epitaxially on Si with the formation of stacking faults. Furthermore, X-ray photoelectron (XPS) and Auger electron (AE) spectroscopy analysis indicate that the InSb crystal size is limited by the impurity concentration resulting from the electrodeposition process.
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Metastable wurtzite crystal phases of conventional semiconductors comprise enormous potential for high-performance electro-optical devices, owed to their extended tunable direct band gap range. However, synthesizing these materials in good quality and beyond nanowire size constraints has remained elusive. In this work, the epitaxy of wurtzite InP microdisks and related geometries on insulator for advanced optical applications is explored. This is achieved by an elaborate combination of selective area growth of fins and a zipper-induced epitaxial lateral overgrowth, which enables co-integration of diversely shaped crystals at precise position. The grown material possesses high phase purity and excellent optical quality characterized by STEM and µ-PL. Optically pumped lasing at room temperature is achieved in microdisks with a lasing threshold of 365 µJ cm-2. Our platform could provide novel geometries for photonic applications.
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Photonic crystal (PhC) cavities are promising candidates for Si photonics integrated circuits due to their ultrahigh quality (Q)-factors and small mode volumes. Here, we demonstrate a novel concept of a one-dimensional hybrid III-V/Si PhC cavity which exploits a combination of standard silicon-on-insulator technology and active III-V materials. Using template-assisted selective epitaxy, the central part of a Si PhC lattice is locally replaced with III-V gain material. The III-V material is placed to overlap with the maximum of the cavity mode field profile, while keeping the major part of the PhC in Si. The selective epitaxy process enables growth parallel to the substrate, and hence in-plane integration with Si, and in-situ in-plane homo- and heterojunctions. The fabricated hybrid III-V/Si PhCs show emission over the entire telecommunication band from 1.2 to 1.6 µm at room temperature validating the device concept and its potential towards fully integrated light sources on silicon.
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Metastable crystal phases of abundant semiconductors such as III-Vs, Si, or Ge comprise enormous potential to address current limitations in green light-emitting electrical diodes (LEDs) and group IV photonics. At the same time, these nonconventional polytypes benefit from the chemical similarity to their stable counterparts, which enables the reuse of established processing technology. One of the main challenges is the very limited availability and the small crystal sizes that have been obtained so far. In this work, we explore the limitations of wurtzite (WZ) film epitaxy on the example of InP. We develop a novel method to switch and maintain a metastable phase during a metal-organic vapor phase epitaxy process based on epitaxial lateral overgrowth and compare it with standard selective area epitaxy techniques. We achieve unprecedented large WZ layer dimensions exceeding 100 µm2 and prove their phase purity both by optical as well as structural characterization. On the basis of our observations, we further develop a nucleation-based model and argue on a fundamental size limitation of WZ film growth. Our findings may pave the way toward crystal phase engineered LEDs for highly efficient lighting and display applications.
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InGaAs is a potential candidate for Si replacement in upcoming advanced technological nodes because of its excellent electron transport properties and relatively low interface defect density in dielectric gate stacks. Therefore, integrating InGaAs devices with the established Si platforms is highly important. Using template-assisted selective epitaxy (TASE), InGaAs nanowires can be monolithically integrated with high crystal quality, although the mechanisms of group III incorporation in this ternary material have not been thoroughly investigated. Here we present a detailed study of the compositional variations of InGaAs nanostructures epitaxially grown on Si(111) and Silicon-on-insulator substrates by TASE. We present a combination of XRD data and detailed EELS maps and find that the final Ga/In chemical composition depends strongly on both growth parameters and the growth facet type, leading to complex compositional sub-structures throughout the crystals. We can further conclude that the composition is governed by the facet-dependent chemical reaction rates at low temperature and low V/III ratio, while at higher temperature and V/III ratio, the incorporation is transport limited. In this case we see indications that the transport is a competition between Knudsen flow and surface diffusion.
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III-V semiconductors are being considered as promising candidates to replace silicon channel for low-power logic and RF applications in advanced technology nodes. InGaAs is particularly suitable as the channel material in n-type metal-oxide-semiconductor field-effect transistors (MOSFETs), due to its high electron mobility. In the present work, we report on InGaAs FinFETs monolithically integrated on silicon substrates. The InGaAs channels are created by metalâ»organic chemical vapor deposition (MOCVD) epitaxial growth within oxide cavities, a technique referred to as template-assisted selective epitaxy (TASE), which allows for the local integration of different III-V semiconductors on silicon. FinFETs with a gate length down to 20nm are fabricated based on a CMOS-compatible replacement-metal-gate process flow. This includes self-aligned source-drain n⺠InGaAs regrown contacts as well as 4 nm source-drain spacers for gate-contacts isolation. The InGaAs material was examined by scanning transmission electron microscopy (STEM) and the epitaxial structures showed good crystal quality. Furthermore, we demonstrate a controlled InGaAs digital etching process to create doped extensions underneath the source-drain spacer regions. We report a device with gate length of 90 nm and fin width of 40 nm showing on-current of 100 µA/µm and subthreshold slope of about 85 mV/dec.
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Recent research on nanowires (NWs) demonstrated the ability of III-V semiconductors to adopt a different crystallographic phase when they are grown as nanostructures, giving rise to a novel class of materials with unique properties. Controlling the crystal structure however remains difficult and the geometrical constraints of NWs cause integration challenges for advanced devices. Here, we report for the first time on the phase-controlled growth of micron-sized planar InP films by selecting confined growth planes during template-assisted selective epitaxy. We demonstrate this by varying the orientation of predefined templates, which results in concurrent formation of zinc-blende (ZB) and wurtzite (WZ) material exhibiting phase purities of 100% and 97%, respectively. Optical characterization revealed a 70 meV higher band gap and a 2.5× lower lifetime for WZ InP in comparison to its natural ZB phase. Further, a model for the transition of the crystal structure is presented based on the observed growth facets and the bonding configuration of InP surfaces.
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Today, silicon is the most used material in photovoltaics, with the maximum conversion efficiency getting very close to the Shockley-Queisser limit for single-junction devices. Integrating silicon with higher band-gap ternary III-V absorbers is the path to increase the conversion efficiency. Here, we report on the first monolithic integration of Ga xIn(1- x)P vertical nanowires, and the associated p-n junctions, on silicon by the Au-free template-assisted selective epitaxy (TASE) method. We demonstrate that TASE allows for a high chemical homogeneity of ternary alloys through the nanowires. We then show the influence of doping on the chemical composition and crystal phase, the latter previously attributed to the role of the contact angle in the liquid phase in the vapor-liquid-solid technique. Finally, the emission of the p-n junction is investigated, revealing a shift in the energy of the intraband levels due to the incorporation of dopants. These results clarify some open questions on the effects of doping on ternary III-V nanowire growth and provide the path toward their integration on the silicon platform in order to apply them in next-generation photovoltaic and optoelectronic devices.
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Additional functionalities on semiconductor microchips are progressively important in order to keep up with the ever-increasing demand for more powerful computational systems. Monolithic III-V integration on Si promises to merge mature Si CMOS processing technology with III-V semiconductors possessing superior material properties, e. g., in terms of carrier mobility or band structure (direct band gap). In particular, Si photonics would strongly benefit from an integration scheme for active III-V optoelectronic devices in order to enable low-cost and power-efficient electronic-photonic integrated circuits. We report on room-temperature lasing from AlGaAs/GaAs microdisk cavities monolithically integrated on Si(001) using a selective epitaxial growth technique called template-assisted selective epitaxy. The grown gain material possesses high optical quality without indication of threading dislocations, antiphase boundaries, or twin defects. The devices exhibit single-mode lasing at T < 250 K and lasing thresholds between 2 and 18 pJ/pulse depending on the cavity size (1-3 µm in diameter).